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Edição das 09h55min de 19 de junho de 2013
VHDL (VHSIC Hardware Description Language) is a hardware description language used in electronic design automation to describe digital and mixed-signal systems such as field-programmable gate arrays and integrated circuits. VHDL can also be used as a general purpose parallel programming language.
História
Vantagens
Desvantagens
Altera
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Padrões de Projeto
References
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Further reading
- "Digital Design: With RTL, VHDL, and Verilog" (2nd ed, Wiley, 2010); Plus "VHDL for Digital Design" / "Verilog for Digital Design" (Wiley 2007)
