VHDL

VHDL (VHSIC Hardware Description Language) is a hardware description language used in electronic design automation to describe digital and mixed-signal systems such as field-programmable gate arrays and integrated circuits. VHDL can also be used as a general purpose parallel programming language.

Desvantagens

Altera

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Bons Livros (Recomendados)

• "Digital Design: With RTL, VHDL, and Verilog" (2nd ed, Wiley, 2010); Plus "VHDL for Digital Design" / "Verilog for Digital Design" (Wiley 2007)

Links Uteis

• CSE140: Components and Design Techniques for Digital Systems.
• VHDL Tutorial: Learn by Example -- by Weijun Zhang, July 2001.